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Re: should ioapic_service really be modelling cpu writes?
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From: |
Alex Bennée |
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Subject: |
Re: should ioapic_service really be modelling cpu writes? |
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Date: |
Fri, 11 Nov 2022 14:00:28 +0000 |
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User-agent: |
mu4e 1.9.1; emacs 28.2.50 |
Paolo Bonzini <[email protected]> writes:
> On 11/11/22 13:26, Alex Bennée wrote:
>> if (addr > 0xfff || !index) {
>> switch (attrs.requester_type) {
>> }
>> MSIMessage msi = { .address = addr, .data = val };
>> apic_send_msi(&msi);
>> return MEMTX_OK;
>> }
>
>
>> which at least gets things booting properly. Does this seem like a
>> better modelling of the APIC behaviour?
>
> Yes and you don't even need the "if", just do MTRT_CPU vs everything
> else.
Can the CPU trigger MSIs by writing to this area of memory? I went for
the explicit switch for clarity but are you saying:
if (attrs.requester_type != MTRT_CPU) {
MSIMessage msi = { .address = addr, .data = val };
apic_send_msi(&msi);
return MEMTX_OK;
} else {
return MEMTX_ACESSS_ERROR;
}
for the MSI range?
>
> Paolo
--
Alex Bennée